A plurality of semiconductor devices is formed on a semiconductor substrate through numbers of semiconductor manufacturing processes. Thereafter, dicing is conducted with a dicing blade along a scribe line region for division of individual semiconductor device regions.
At the time of dicing along a scribe line region, when films of SiO2, SiN, SiON, and the like remain deposited in the scribe line region, cutting these films causes a dicing blade to gradually clog. Then, chipping occurs at an end portion of a semiconductor device. Therefore, for preventing such a situation from occurring, there is provided a technology of removing an interlayer insulating film or a passivation film by etching (see Patent Document 1).
Additionally, in a solid-state image pickup element and the like, on a passivation film, a planarizing coat film, and an organic film such as a color filter, an on-chip lens material or the like are further laminated. Dicing these films might cause scattering dusts or peel-off of an undercoat from a passivation film. These dusts attach to a light receiving portion of a solid-state image pickup element to have a defective pixel, thereby inviting deterioration in yields, in addition to a defective appearance. A countermeasure is to similarly conduct etching removal in a wafer process before dicing so as to minimize dicing of an organic film.
As conventional art, there is proposed a structure in which simultaneously with resist patterning for pad portion opening, resist patterning is conducted also along a scribe line region to simultaneously etch both the patterns, thereby reducing the number of works for a wafer process while reducing occurrence of a defective appearance after dicing (see Patent Document 2).